Specifikācija

• Maximum clock speed was 740 kHz
• Instruction cycle time: 10.8 µs[14] (8 clock cycles / instruction cycle)
• Instruction execution time 1 or 2 instruction cycles (10.8 or 21.6 µs), 46300 to 92600 instructions per second.
  • Adding two 8-digit numbers (32 bits each, assuming 4-bit BCD digits) was stated as taking 850 µs - i.e. 79 instruction cycles, about 10 instruction cycles per decimal digit.
• Separate program and data storage. Contrary to Harvard architecture designs, however, which use separate buses, the 4004, with its need to keep pin count down, used a single multiplexed 4-bit bus for transferring:
  • 12-bit addresses
  • 8-bit instructions
  • 4-bit data words
• Able to directly address 5120 bits (equivalent to 640 bytes) of RAM, stored as 1280 4-bit "characters" and organised into groups representing 1024 "data" and 256 "status" characters (512 and 128 bytes).
• Able to directly address 32768 bits of ROM, equivalent to and arranged as 4096 8-bit characters (i.e. bytes).
• Instruction set contained 46 instructions (of which 41 were 8 bits wide and 5 were 16 bits wide)
• Register set contained 16 registers of 4 bits each
• Internal subroutine stack, 3 levels deep.